XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 66

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
FLASH-1 Memory
4.3 Functional Description
Technical Data
66
NOTE:
The FLASH-1 memory is an array of 32,256 bytes with two bytes of block
protection (one byte for protecting areas within FLASH-1 array and one
byte for protecting areas within FLASH-2 array) and an additional 40
bytes of user vectors on the MC68HC908AS60A and 52 bytes of user
vectors on the MC68HC908AZ60A. An erased bit reads as a logic 1 and
a programmed bit reads as a logic 0.
Memory in the FLASH-1 array is organized into rows within pages. There
are two rows of memory per page with 64 bytes per row. The minimum
erase block size is a single page,128 bytes. Programming is performed
on a per-row basis, 64 bytes at a time. Program and erase operations
are facilitated through control bits in the FLASH-1 Control Register
(FL1CR). Details for these operations appear later in this section.
The FLASH-1 memory map consists of:
Programming tools are available from Motorola. Contact your local
Motorola representative for more information.
A security feature prevents viewing of the FLASH contents.
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
$8000–$FDFF: User Memory (32,256 bytes)
$FF80: FLASH-1 Block Protect Register (FL1BPR)
$FF81: FLASH-2 Block Protect Register (FL2BPR)
$FF88: FLASH-1 Control Register (FL1CR)
$FFCC–$FFFF: these locations are reserved for user-defined
interrupt and reset vectors (Please see
Priority
on page 61 for details)
FLASH-1 Memory
MC68HC908AZ60A — Rev 2.0
Vector Addresses and
(1)
MOTOROLA

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