XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 325

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
20.4.4.1 Unbuffered PWM Signal Generation
MC68HC908AZ60A — Rev 2.0
MOTOROLA
The value in the TIMB counter modulo registers and the selected
prescaler output determines the frequency of the PWM output. The
frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the TIMB counter modulo registers produces a PWM
period of 256 times the internal bus clock period if the prescaler select
value is $000 (see
The value in the TIMB channel registers determines the pulse width of
the PWM output. The pulse width of an 8-bit PWM signal is variable in
256 increments. Writing $0080 (128) to the TIMB channel registers
produces a duty cycle of 128/256 or 50%.
Any output compare channel can generate unbuffered PWM pulses as
described in
are unbuffered because changing the pulse width requires writing the
new pulse width value over the value currently in the TIMB channel
registers.
An unsynchronized write to the TIMB channel registers to change a
pulse width value could cause incorrect operation for up to two PWM
periods. For example, writing a new value before the counter reaches
the old value but after the counter reaches the new value prevents any
compare during that PWM period. Also, using a TIMB overflow interrupt
routine to write a new, smaller pulse width value may cause the compare
PTEx/TCHx
OVERFLOW
Timer Interface Module B (TIMB)
Pulse Width Modulation (PWM)
Figure 20-3. PWM Period and Pulse Width
PULSE
WIDTH
TIMB Status and Control
PERIOD
COMPARE
OUTPUT
OVERFLOW
COMPARE
Timer Interface Module B (TIMB)
OUTPUT
Register).
on page 324. The pulses
OVERFLOW
Functional Description
Technical Data
COMPARE
OUTPUT
325

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