XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 512

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
Byte Data Link Controller (BDLC)
27.7 BDLC CPU Interface
Technical Data
512
The CPU interface provides the interface between the CPU and the
BDLC and consists of five user registers.
BDLC analog and roundtrip delay register (BARD)
BDLC control register 1 (BCR1)
BDLC control register 2 (BCR2)
BDLC state vector register (BSVR)
BDLC data register (BDR)
Byte Data Link Controller (BDLC)
Figure 27-14. BDLC Block Diagram
PHYSICAL INTERFACE
PROTOCOL HANDLER
CPU INTERFACE
MUX INTERFACE
TO J1850 BUS
TO CPU
MC68HC908AZ60A — Rev 2.0
BDLC
MOTOROLA

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