XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 163

• Manufacturer Part Number: XC908AS60ACFU
• Description: MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
• Manufacturer: Motorola Semiconductor Products

9.7.1 Wait Mode
MC68HC908AZ60A — Rev 2.0
MOTOROLA
In wait mode, the CPU clocks are inactive while one set of peripheral
clocks continue to run.
A module that is active during wait mode can wake up the CPU with an
interrupt if the interrupt is enabled. Stacking for the interrupt begins one
cycle after the WAIT instruction during which the interrupt occurred.
Refer to the wait mode subsection of each module to see if the module
is active or inactive in wait mode. Some modules can be programmed to
be active in wait mode.
Wait mode can also be exited by a reset or break. A break interrupt
during wait mode sets the SIM break wait bit, BW, in the SIM break
status register (SBSR). If the COP disable bit, COPD, in the
configuration register is logic 0, then the computer operating properly
module (COP) is enabled and remains active in wait mode.
EXITSTOPWAIT
NOTE: EXITSTOPWAIT =
R/W
IDB
IAB
NOTE: Previous data can be operand data or the WAIT opcode, depending on the last instruction.
IDB
IAB
$A6
Figure 9-13. Wait Recovery from Interrupt or Break
System Integration Module (SIM)
WAIT ADDR
$6E0B
$A6
PREVIOUS DATA
Figure 9-12. Wait Mode Entry Timing
RST
$A6
Figure 9-12
WAIT ADDR + 1
pin OR CPU interrupt OR break interrupt
$6E0C
$01
NEXT OPCODE
$00FF
shows the timing for wait mode entry.
$0B
SAME
$00FE
System Integration Module (SIM)
$6E
SAME
$00FD
SAME
Low-Power Modes
$00FC
SAME
Technical Data
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