XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 136

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
Central Processor Unit (CPU)
8.6 Low-power modes
8.6.1 WAIT mode
8.6.2 STOP mode
8.7 CPU during break interrupts
Technical Data
136
The WAIT and STOP instructions put the MCU in low--power
consumption standby modes.
The WAIT instruction:
The STOP instruction:
After exiting STOP mode, the CPU clock begins running after the
oscillator stabilization delay.
If the break module is enabled, a break interrupt causes the CPU to
execute the software interrupt instruction (SWI) at the completion of the
current CPU instruction. See
counter vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor mode).
A return-from-interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
clears the interrupt mask (I bit) in the condition code register,
enabling interrupts. After exit from WAIT mode by interrupt, the I
bit remains clear. After exit by reset, the I bit is set.
Disables the CPU clock
clears the interrupt mask (I bit) in the condition code register,
enabling external interrupts. After exit from STOP mode by
external interrupt, the I bit remains clear. After exit by reset, the I
bit is set.
Disables the CPU clock
Central Processor Unit (CPU)
Break Module
(BRK). The program
MC68HC908AZ60A — Rev 2.0
MOTOROLA

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