XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 423

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
23.14.8 MSCAN08 Transmitter Control Register
MC68HC908AZ60A — Rev 2.0
MOTOROLA
NOTE:
NOTE:
Address:
ABTRQ2–ABTRQ0 — Abort Request
The software must not clear one or more of the TXE flags in CTFLG and
simultaneously set the respective ABTRQ bit(s).
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable
The CTCR register is held in the reset state when the SFTRES bit in
CMCR0 is set.
Reset:
Read:
Write:
The CPU sets an ABTRQx bit to request that an already scheduled
message buffer (TXE = 0) be aborted. The MSCAN08 will grant the
request if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a
message is aborted the associated TXE and the abort acknowledge
flag (ABTAK) (see
421) will be set and an TXE interrupt is generated if enabled. The
CPU cannot reset ABTRQx. ABTRQx is cleared implicitly whenever
the associated TXE flag is set.
1 = Abort request pending
0 = No abort request
1 = A transmitter empty (transmit buffer available for transmission)
0 = No interrupt is generated from this event.
Figure 23-22. Transmitter Control Register (CTCR)
$0507
Bit 7
event results in a transmitter empty interrupt.
0
0
MSCAN Controller (MSCAN08)
ABTRQ2 ABTRQ1 ABTRQ0
= Unimplemented
6
0
MSCAN08 Transmitter Flag Register
5
0
4
0
Programmer’s Model of Control Registers
3
0
0
MSCAN Controller (MSCAN08)
TXEIE2
2
0
TXEIE1
1
0
Technical Data
on page
TXEIE0
Bit 0
0
423

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