XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 199

• Manufacturer Part Number: XC908AS60ACFU
• Description: MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
• Manufacturer: Motorola Semiconductor Products

MC68HC908AZ60A — Rev 2.0
MOTOROLA
NOTE:
LVIPWR — LVI Power Enable Bit
SSREC — Short Stop Recovery Bit
If using an external crystal oscillator, do not set the SSREC bit.
COPL — COP Long Timeout
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
Extra care should be exercised when using this emulation part for
development of code to be run in ROM AZ, AB or AS parts that the
options selected by setting the CONFIG-1 register match exactly
the options selected on any ROM code request submitted. The
enable/disable logic is not necessarily identical in all parts of the
AS and AZ families. If in doubt, check with your local field
applications representative.
LVIPWR enables the LVI module. (See
page 229).
SSREC enables the CPU to exit stop mode with a delay of 32
CGMXCLK cycles instead of a 4096-CGMXCLK cycle delay. (See
Stop Mode
COPL enables the shorter COP timeout period. (See
Operating Properly (COP)
STOP enables the STOP instruction.
COPD disables the COP module. (See
Properly (COP)
1 = LVI module power enabled
0 = LVI module power disabled
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
1 = COP timeout period is 2
0 = COP timeout period is 2
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Configuration Register (CONFIG-1)
on page 164).
on page 223).
on page 223).
13
18
– 2
– 2
4
4
CGMXCLK cycles
CGMXCLK cycles
Low Voltage Inhibit (LVI)
Configuration Register (CONFIG-1)
Computer Operating
Functional Description
Computer
Technical Data
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