XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 520

• Manufacturer Part Number: XC908AS60ACFU
• Description: MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
• Manufacturer: Motorola Semiconductor Products

Byte Data Link Controller (BDLC)
Technical Data
520
NB = Normalization Bit
ID = Identifier (usually the physical address of the responder(s))
HEADER = Specifies one of three frame lengths
HEADER
HEADER
HEADER
HEADER
TYPE 0 — NO IFR
TYPE 1 — SINGLE BYTE TRANSMITTED FROM A SINGLE RESPONDER
TYPE 2 — SINGLE BYTE TRANSMITTED FROM MULTIPLE RESPONDERS
TYPE 3 — MULTIPLE BYTES TRANSMITTED FROM A SINGLE RESPONDER
Figure 27-18. Types of In-Frame Response (IFR)
DATA FIELD
DATA FIELD
DATA FIELD
DATA FIELD
The BDLC supports the in-frame response (IFR) feature of J1850 by
setting these bits correctly. The four types of J1850 IFR are shown
below. The purpose of the in-frame response modes is to allow
multiple nodes to acknowledge receipt of the data by responding with
their personal ID or physical address in a concatenated manner after
they have seen the EOD symbol. If transmission arbitration is lost by
a node while sending its response, it continues to transmit its
ID/address until observing its unique byte in the response stream. For
VPW modulation, because the first bit of the IFR is always passive, a
normalization bit (active) must be generated by the responder and
sent prior to its ID/address byte. When there are multiple responders
on the J1850 bus, only one normalization bit is sent which assists all
other transmitting nodes to sync up their response.
Byte Data Link Controller (BDLC)
CRC
CRC
CRC
CRC
NB
NB
NB
ID1
ID
IFR DATA FIELD
MC68HC908AZ60A — Rev 2.0
ID N
(OPTIONAL)
CRC
MOTOROLA