XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 158

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XC908AS60ACFU

Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
System Integration Module (SIM)
9.6.1 Interrupts
Technical Data
158
INTERRUPT
MODULE
I BIT
R/W
IDB
IAB
DUMMY
DUMMY
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal
processing can resume.
9-10
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced (or the I bit is cleared), see
9-9.
SP
PC – 1[7:0]
shows interrupt recovery timing.
SP – 1
Figure 9-8
System Integration Module (SIM)
PC – 1[15:8]
SP – 2
X
.
SP – 3
Interrupt Entry
Figure 9-8
A
SP – 4
CCR
shows interrupt entry timing.
VECT H
V DATA H
VECT L
MC68HC908AZ60A — Rev 2.0
V DATA L
START ADDR
OPCODE
MOTOROLA
Figure
Figure

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