XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 206
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
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Break Module (BRK)
13.4.2 CPU During Break Interrupts
13.4.3 TIM During Break Interrupts
13.4.4 COP During Break Interrupts
13.5 Low-Power Modes
13.5.1 Wait Mode
Technical Data
206
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A break interrupt stops the timer counter.
The COP is disabled during a break interrupt when V
RST pin.
The WAIT and STOP instructions put the MCU in low power-consump-
tion standby modes.
If enabled, the break module is active in wait mode. The SIM break wait
bit (BW) in the SIM break status register indicates whether wait was
exited by a break interrupt. If so, the user can modify the return address
on the stack by subtracting one from it. (See
on page 166).
•
•
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC:$FFFD ($FEFC:$FEFD
in monitor mode)
Break Module (BRK)
SIM Break Status Register
MC68HC908AZ60A — Rev 2.0
Hi
is present on the
MOTOROLA
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