XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 157

• Manufacturer Part Number: XC908AS60ACFU
• Description: MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
• Manufacturer: Motorola Semiconductor Products

9.5.2 SIM Counter During Stop Mode Recovery
9.5.3 SIM Counter and Reset States
9.6 Program Exception Control
MC68HC908AZ60A — Rev 2.0
MOTOROLA
is initialized, it enables the clock generation module (CGM) to drive the
bus clock state machine.
The SIM counter also is used for stop mode recovery. The STOP
instruction clears the SIM counter. After an interrupt or reset, the SIM
senses the state of the short stop recovery bit, SSREC, in the CONFIG-
1 register. If the SSREC bit is a logic one, then the stop recovery is
reduced from the normal delay of 4096 CGMXCLK cycles down to 32
CGMXCLK cycles. This is ideal for applications using canned oscillators
that do not require long start-up times from stop mode. External crystal
applications should use the full stop recovery time, that is, with SSREC
cleared.
External reset has no effect on the SIM counter. See
page 164 for details. The SIM counter is free-running after all reset
states. See
counter control and internal reset recovery sequences.
Normal, sequential program execution can be changed in three different
ways:
•
•
•
Interrupts
– Maskable hardware CPU interrupts
– Non-maskable software interrupt instruction (SWI)
Reset
Break interrupts
System Integration Module (SIM)
Active Resets from Internal Sources
System Integration Module (SIM)
Program Exception Control
on page 153 for
Stop Mode
Technical Data
on
157