dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 101
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
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6.3.2.2
The 24 AGU registers are 16 bits wide. They may be accessed as word operands for
address, address modifier, and data storage. When used as a source operand, these reg-
isters occupy the low-order portion of the 24-bit word; the high-order portion is read as
zeros (see Figure 6-5). When used as a destination operand, these registers receive the
low-order portion of the word; the high-order portion is not used. The notation “Rn” desig-
nates one of the eight address registers, R0–R7; the notation “Nn” designates one of the
eight address offset registers, N0–N7; and the notation “Mn” designates one of the eight
MOTOROLA
AGU Registers
Figure 6-4 Reading and Writing the ALU Extension Registers
ADDRESS ALU REGISTERS
ADDRESS ALU REGISTERS
Figure 6-5 Reading and Writing the Address ALU Registers
REGISTER A2, B2 USED
USED AS A SOURCE
AS A DESTINATION
REGISTER A2, B2
AS A DESTINATION
AS A SOURCE
Freescale Semiconductor, Inc.
INSTRUCTION SET INTRODUCTION
For More Information On This Product,
INSTRUCTION FORMATS
Go to: www.freescale.com
23
23
23
SIGN EXTENSION
NOT USED
ZERO FILL
23
23
NOT USED
NOT USED
OF A2
16 15
15
8 7
8 7
8 7
CONTENTS
LSB OF
OF A2
WORD
LSB OF
A2
WORD
0
0
0
0
0
0
BUS
BUS
REGISTER A2, B2
BUS
BUS
ADDRESS ALU
REGISTERS
6 - 7
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