dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 305
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 305 of 637
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Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting occurs during parallel move
E — Set if the signed integer portion of A or B result is in use
U — Set if A or B result is unnormalized
N — Set if bit 55 of A or B result is set
Z— Set if A or B result equals zero
V — Always cleared
C — Set if bit 0 of A or B was set prior to instruction execution
Note: The definitions of the E and U bits vary according to the scaling mode being used.
Refer to Section A.5 for complete details.
Instruction Format:
Opcode:
Instruction Fields:
Timing: 2+mv oscillator clock cycles
Memory: 1+mv program words
MOTOROLA
ASR
ASR
D
A
B
23
15
LF
d
0
1
D
DM
14
13
T
Freescale Semiconductor, Inc.
DATA BUS MOVE FIELD
**
12
For More Information On This Product,
MR
Arithmetic Shift Accumulator Right
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
OPTIONAL EFFECTIVE ADDRESS EXTENSION
S0
10
Go to: www.freescale.com
I1
9
I0
8
S
7
8
L
6
7
0
E
5
0
U
4
CCR
1
N
3
0
Z
4
2
3
d
V
1
0
C
0
ASR
1
0
0
A - 39
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