dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 298

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

Operation:
Description: Logically AND the source operand S with bits 47–24 of the destination
operand D and store the result in bits 47–24 of the destination accumulator. This instruc-
tion is a 24-bit operation. The remaining bits of the destination operand D are not
affected.
Example:
Explanation of Example: Prior to execution, the 24-bit X0 register contains the value
$FF0000, and the 56-bit A accumulator contains the value $00:123456:789ABC. The
AND X0,A instruction logically ANDs the 24-bit value in the X0 register with bits 47–24 of
the A accumulator (A1) and stores the result in the A accumulator with bits 55–48 and
23–0 unchanged.
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if limiting occurs during parallel move
N — Set if bit 47 of A or B result is set
Z— Set if bits 47–24 of A or B result are zero
V — Always cleared
A - 32
AND
S
where denotes the logical AND operator
D[47:24] D[47:24] (parallel move)
AND X0,A1 (R5)–N5
X0
A
15
LF
:
:
DM
14
$00:123456:789ABC
Before Execution
13
T
Freescale Semiconductor, Inc.
**
12
For More Information On This Product,
MR
$FF0000
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
S0
10
Go to: www.freescale.com
Logical AND
I1
9
;AND X0 with A1, update R5 using N5
I0
8
S
7
Assembler Syntax:
X0
A
L
6
E
5
$00:120000:789ABC
After Execution
U
4
CCR
AND S,D (parallel move)
N
3
$FF0000
Z
2
V
1
C
0
MOTOROLA
AND