dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 118
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dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 118 of 637
- Download datasheet (4Mb)
Therefore, the instruction actually ignores what appears to be a duplicate destination and
logically ANDs the value in the X0 register with the bits in the A1 portion (bits 47-24) of
the A accumulator. The parallel move shown above can simultaneously write to either of
the other two portions of the A or the B accumulator without conflict. Avoid confusion by
explicitly stating A1 or B1 in the original instruction.
Optional data transfers may be specified with most logical instructions, allowing parallel
data movement over the XDB and YDB or over the GDB during a data ALU operation.
This parallel movement allows new data to be prefetched for use in subsequent instruc-
tions and allows results calculated in previous instructions to be stored. The following list
includes the logical instructions:
6 - 24
*These instructions do not allow parallel data moves.
AND
ANDI
EOR
LSL
LSR
NOT
OR
ORI
ROL
ROR
*
*
Logical AND
AND Immediate to Control Register
Logical Exclusive OR
Logical Shift Left
Logical Shift Right
Logical Complement
Logical Inclusive OR
OR Immediate to Control Register
Rotate Left
Rotate Right
Freescale Semiconductor, Inc.
INSTRUCTION SET INTRODUCTION
For More Information On This Product,
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Go to: www.freescale.com
MOTOROLA
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