dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 363
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 363 of 637
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Notes: If A or B is specified as the destination operand, the following sequence of events
Timing: 6+mv oscillator clock cycles
Memory: 2 program words
MOTOROLA
DO
1. The S bit is computed according to its definition (See Section A.5)
2. The accumulator value is scaled according to the scaling mode bits S0
3. If the accumulator extension is in use, the output of the shifter is limited
4. The LS 16 bits of the resulting 24 bit value is loaded into the loop
takes place:
and S1 in the status register (SR).
to the maximum positive or negative saturation constant, and the L bit is
set.
counter (LC). The original contents of A or B are not changed.
Freescale Semiconductor, Inc.
For More Information On This Product,
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Go to: www.freescale.com
Start Hardware Loop
DO
A - 97
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