dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 573

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

Other Restrictions
Note: Due to pipelining, if an address register (R0–R7, N0–N7, or M0–M7) is changed
using a move-type instruction (LUA, Tcc, MOVE, MOVEC, MOVEM, MOVEP, or parallel
move), the new contents of the destination address register will not be available for use
during the following instruction (i.e., there is a single instruction cycle pipeline delay).
This restriction also applies to the situation in which the last instruction in a DO loop
changes an address register and the first instruction at the top of the DO loop uses that
same address register. The top instruction becomes the following instruction because
of the loop construct. The assembler will generate a warning if this condition is detected.
A.9.2 Other DO Restrictions
Due to pipelining, the DO instruction must not be immediately preceded by any of the
following instructions:
Immediately before DO
A.9.3 ENDDO Restrictions
Due to pipelining, the ENDDO instruction must not be immediately preceded by any of
the following instructions:
MOTOROLA
INSTRUCTION SEQUENCE RESTRICTIONS
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INSTRUCTION SET DETAILS
DO SSH,xxxx
JSR to (LA) whenever the loop flag (LF) is set
JScc to (LA) whenever the loop flag (LF) is set
JSCLR to (LA) whenever the loop flag (LF) is set
JSSET to (LA) whenever the loop flag (LF) is set
BCHG LA, LC, SSH, SSL, or SP
BCLR LA, LC, SSH, SSL, or SP
BSET LA, LC, SSH, SSL, or SP
MOVEC to LA, LC, SSH, SSL, or SP
MOVEM to LA, LC, SSH, SSL, or SP
MOVEP to LA, LC, SSH, SSL, or SP
MOVEC from SSH
MOVEM from SSH
MOVEP from SSH
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