dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 330

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Operation:
Description: Test the n
stored in the carry bit C of the condition code register. The bit to be tested is selected by
an immediate bit number from 0–23. This instruction is useful for performing serial to par-
allel conversion when used with the appropriate rotate instructions. This instruction can
use all memory alterable addressing modes.
Example:
Explanation of Example: Prior to execution, the 24-bit X location X:$FFEE (I/O SSI sta-
tus register) contains the value $000002. The execution of the BTST #$1,X:<<$FFEE
instruction tests the state of the 1st bit (serial input flag IF1) in X:$FFEE and sets the
carry bit C accordingly. This instruction sequence illustrates serial to parallel conversion
using the carry bit C and the 24-bit A1 register.
A - 64
BTST
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
X:$FFEE
BTST
ROL
SR
C;
C;
C;
C;
C;
C;
C;
:
:
Before Execution
#$0,X:<<$FFEE
A
Freescale Semiconductor, Inc.
$000002
th
$0300
For More Information On This Product,
bit of the destination operand D. The state of the n
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Go to: www.freescale.com
Bit Test
;read SSI serial input flag IF1 into C bit
;rotate carry bit C into LSB of A1
X:$FFEE
Assembler Syntax:
SR
BTST
BTST
BTST
BTST
BTST
BTST
BTST
After Execution
#n,X:ea
#n,X:aa
#n,X:pp
#n,Y:ea
#n,Y:aa
#n,Y:pp
#n,D
$000002
$0301
MOTOROLA
BTST
th
bit is

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