dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 58

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Offset registers are not affected by a processor reset.
4.3.3
The eight 16-bit modifier registers, M0 - M7, define the type of address arithmetic to be
performed for addressing mode calculations, or they can be used for general-purpose
storage. The address ALU supports linear, modulo, and reverse-carry arithmetic types for
all address register indirect addressing modes. For modulo arithmetic, the contents of Mn
also specify the modulus. Each address register, Rn, has its own modifier register, Mn,
associated with it. Each modifier register is set to $FFFF on processor reset, which spec-
ifies linear arithmetic as the default type for address register update calculations.
4.4
The DSP56K provides three different addressing modes: register direct, address register
indirect, and special. Since the register direct and special addressing modes do not nec-
essarily use the AGU registers, they are described in SECTION 6 - INSTRUCTION SET
INTRODUCTION. The address register indirect addressing modes use the registers in
4 - 8
NOTE:
No Update
Postincrement by 1
Postdecrement by 1
Postincrement by Offset Nn
Address Register Indirect
XY = XY Memory Reference
S = System Stack Reference
C = Program Control Unit Register Reference
D = Data ALU Register Reference
A = Address ALU Register Reference
P = Program Memory Reference
X = X Memory Reference
Y = Y Memory Reference
L = L Memory Reference
ADDRESSING
Modifier Register Files (M0
Table 4-1 Address Register Indirect Summary
Freescale Semiconductor, Inc.
For More Information On This Product,
ADDRESS GENERATION UNIT
Uses Mn
Modifier
Go to: www.freescale.com
Yes
Yes
Yes
No
ADDRESSING
-
M3 and M4 - M7)
S
C
Operand Reference
D
A
P
X
X
X
X
X
X
X
X
X
Y
X
X
X
X
X
X
X
X
L
XY
X
X
X
X
(Rn)
(Rn)+
(Rn)–
(Rn)+Nn
Assembler
MOTOROLA
Syntax

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