dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 498

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Operation:
Description: Multiply the two signed 24-bit source operands S1 and S2 ( or the signed
24-bit source operand S by the positive 24-bit immediate operand 2
using convergent rounding, and store it in the specified 56-bit destination accumulator D.
The “–” sign option is used to negate the product prior to rounding. The default sign
option is “+”. The contribution of the LS bits of the result is rounded into the upper portion
of the destination accumulator (A1 or B1) by adding a constant to the LS bits of the lower
portion of the accumulator (A0 or B0). The value of the constant added is determined by
the scaling mode bits S0 and S1 in the status register. Once the rounding has been com-
pleted, the LS bits of the destination accumulator D (A0 or B0) are loaded with zeros to
maintain an unbiased accumulator value which may be reused by the next instruction.
The upper portion of the accumulator (A1 or B1) contains the rounded result which may
be read out to the data buses. Refer to the RND instruction for more complete informa-
tion on the convergent rounding process.
Example 1:
Explanation of Example 1: Prior to execution, the 24-bit Y0 register contains the value
$654321 (0.791111112), and the 56-bit B accumulator contains the value
$00:000000:000000 (0.0). The execution of the MPYR –Y0,Y0,B instruction squares the
24-bit signed value in the Y0 register, negates the resulting 48-bit product, rounds the
result into B1, and zeros B0 (–Y0 Y0=–0.625856790961748 approximately=
$FF:AFE3EC:B76B7E, which is rounded to the value $FF:AFE3ED:000000=
–0.625856757164002=B).
A - 232
MPYR
S1 S2+r
S1 S2+r
(S1 2
MPYR –Y0,Y0,B (R3)–N3
Y0
B
-n
:
:
)+r
D (parallel move)
D (parallel move)
$00:000000:000000
Before Execution
D ( no parallel move)
Freescale Semiconductor, Inc.
For More Information On This Product,
$654321
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Signed Multiply and Round
Go to: www.freescale.com
;square and negate Y0, update R3
Assembler Syntax:
Y0
B
MPYR ( )S1,S2,D (parallel move)
MPYR ( )S2,S1,D (parallel move)
MPYR ( )S,#n,D ( no parallel move)
$FF:AFE3ED:000000
After Execution
$654321
-n
), round the result
MPYR
MOTOROLA

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