dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 286

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

A.6
Many of the instructions in the DSP56K instruction set allow optional parallel data bus
movement. Section A.7 indicates the parallel move option in the instruction syntax with
the statement ‘“parallel move)”. The MOVE instruction is equivalent to a NOP with paral-
lel moves. Therefore, a detailed description of each parallel move is given with the
MOVE instruction details in Section A.7, beginning on page A-160.
A - 20
10. C — Set if bit 47 of the source operand was set prior to instruction execution.
11. C — Set if bit 24 of the source operand was set prior to instruction execution.
12. Set according to the value pulled from the stack.
13. For destination operand SR, the bits are set according to the corresponding bit of
14. Due to complexity, refer to the detailed description of the instruction.
1. The bit is cleared.
2. V — Set if an arithmetic overflow occurs in the 56-bit A or B result or if the MS bit
3. For destination operand CCR, the bits are cleared if the corresponding bits in the
4. C — Set if bit 55 of the source operand was set prior to instruction execution.
5. C — Set if bit 0 of the source operand was set prior to instruction execution. Cleared
6. For destination operand CCR, the bits are set if the corresponding bits in the imme-
7. C — Set if bit 55 of the result is cleared. Cleared otherwise.
8. N — Set if bit 47 of the A or B result is set. Cleared otherwise.
9. Z — Set if bits 47 - 24 of the A or B result are zero. Cleared otherwise.
of the destination operand is changed as a result of the left shift. Cleared otherwise.
immediate data are cleared. Otherwise they are not affected. For other destination
operands, the bits are not affected.
Cleared otherwise.
otherwise.
diate data are set. Otherwise, they are not affected. For other destination operands,
the bits are not affected.
Cleared otherwise.
Cleared otherwise.
the source operand. If SR is not specified as a destination operand, the L bit is set
if data limiting occurred and the S bit is computed according to the definition. (See
Section A.5.) Otherwise, the bits are unaffected.
PARALLEL MOVE DESCRIPTIONS
Freescale Semiconductor, Inc.
For More Information On This Product,
PARALLEL MOVE DESCRIPTIONS
INSTRUCTION SET DETAILS
Go to: www.freescale.com
MOTOROLA