dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 620

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

B - 16
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;
;
;
;
;
;
;*********************************************************************************************************************
;
;*************************************
nsec
start
data
coef
input
output
igain
;
;*********************************************************************
;
end_cell
;****************************************************************************************
Figure B-5 Real Input FFT Based on Glenn Bergland Algorithm (Sheet 5 of 8)
All coefficients are divided by 2:
w(n)/2=x(n)/2-ai1/2*w(n-1)-ai2/2*w(n-2)
y(n)/2=w(n)/2+bi1/2*w(n-1)+bi2/2*w(n-2)
initialization
R0
X Memory Organization
equ
equ
equ
equ
equ
equ
equ
ori
move
move
move
move
move
opt
movep
mpy
do
mac
macr
mac
mac
rnd
movep
end
wN(n-1)
wN(n-2)
w1(n-1)
w1(n-2)
•
•
filter loop: 4*nsec + 9
Data + 2*nsec - 1
Data
4
$40
0
0
$ffe0
$ffe1
0.5
#$08,mr
#data,r0
#coef,r4
#2*nsec - 1,m0
#4*nsec - 1,m4
#igain,y1
cc
y0,y1,a
-x0,y0,a
-x1,y0,a
x0,y0,a
x1,y0,a
a
a,y:output
Freescale Semiconductor, Inc.
y:input,y0
#nsec,end_cell
For More Information On This Product,
BENCHMARK PROGRAMS
BENCHMARK PROGRAMS
x:(r0) +,x0
x:(r0) -,x1
x1,x:(r0) +
a,x:(r0)+
x:(r0) +,x0
Go to: www.freescale.com
R4
;set scaling mode
;point to filter states
;point to filter coefficients
;y1=initial gain
Y Memory Organization
y:(r4)+,y0
y:(r4) +,y0
y:(r4) +,y0
y:(r4) +,y0
y:(r4) +,y0
b2N/2
a1N/2
a2N/2
b11/2
b21/2
b1N/2
a11/2
a21/2
•
•
;get sample
;x0=1st section w(n-2),y0=ai2/2
;x1=w(n-1),y0=ai1/2
;push w(n-1) to w(n-2),y0=bi2/2
;push w(n) to w(n-1),y0=bi1/2
;next iter:x0=w(n-2),y0=ai2/2
;round result
;output sample
;do each section
Coef.
Coef. + 4*nsec - 1
MOTOROLA