dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 48

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
cision values and accumulated using regular MAC instructions. Note that the maximum
number of single times double MAC operations in this algorithm are limited to 255 since
overflow may occur (the A2 register is just eight bits long). If a longer sequence is
required, it should be split into sub-sequences each with no more than 255 MAC opera-
tions.
3 - 18
move
clr a
ori
move
rep
mac
andi
move
move
move
move
rep
mac
move
Figure 3-13 Single
#$40,mr
#N
x0,y1,a
#$bf,mr
#N
x0,y1,a
a,l:(r0)+
R0
R1
DP3_DP2_DP1 =
DOUBLE PRECISION MULTIPLY MODE
Freescale Semiconductor, Inc.
#N-1,m5
#0,y0
x:(r1)+,x0
x:(r1)+,x0
a0,x:(r0)+
a1,y0
a2,a
y0,a0
x:(r1)+,x0
For More Information On This Product,
DATA ARITHMETIC LOGIC UNIT
MSPi
LSPi
Go to: www.freescale.com
DP3
DP1
X:
Double Multiply-Accumulate Algorithm
y:(r5)+,y1
y:(r5)+,y1
y:(r5)+,y1
MSPi_LSPi x SPi
DP2
SPi
Y:
;clear a and y0
;enter DP mode
;load LSPi and SPi
;0<N<256
;LSPi*SPi
;exit DP mode
;save DP1
;a2:a1
;load MSPi and SPi
;save DP3_DP2
a1:a0
a
R5
R0
MOTOROLA

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