dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 314
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 314 of 637
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Operation:
Description: Test the n
the destination location. The state of the n
code register. The bit to be tested is selected by an immediate bit number from 0–23.
This instruction performs a read-modify-write operation on the destination location using
two destination accesses before releasing the bus. This instruction provides a test-and-
clear capability which is useful for synchronizing multiple processors using a shared
memory. This instruction can use all memory alterable addressing modes.
Example:
A - 48
BCLR
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
X:$FFE4
0
0
0
0
0
0
0
BCLR
SR
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
C;
C;
C;
C;
C;
C;
C;
:
:
Before Execution
#$E,X:<<$FFE4
$FFFFFF
Freescale Semiconductor, Inc.
th
$0300
For More Information On This Product,
bit of the destination operand D, clear it and store the result in
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Go to: www.freescale.com
Bit Test and Clear
;test and clear bit 14 in I/O Port B Data Reg.
th
bit is stored in the carry bit C of the condition
X:$FFE4
SR
Assembler Syntax:
BCLR
BCLR
BCLR
BCLR
BCLR
BCLR
BCLR
After Execution
$FFBFFF
#n,X:ea
#n,X:aa
#n,X:pp
#n,Y:ea
#n,Y:aa
#n,Y:pp
#n,D
$0301
BCLR
MOTOROLA
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