dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 449

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move.
Class I Instruction Format:
Opcode:
Instruction Fields:
where “rrr” refers to an address register R0–R7
MOTOROLA
X:R
Register W
Read S
Write D 1
( . . . . . ) X:ea,D1
( . . . . . ) S1,X:ea
( . . . . . ) #xxxxxx,
ea=6-bit Effective Address=MMMRRR
23
0
15
LF
0
0
DM
14
0
1
13
T
f
Freescale Semiconductor, Inc.
Addressing Mode M M M R R R
(Rn)-Nn
(Rn)+Nn
(Rn)-
(Rn)+
(Rn)
(Rn+Nn)
-(Rn)
Absolute address
Immediate data
**
12
f
For More Information On This Product,
S2, D2
S2,D2
S2,D2
X Memory and Register Data Move
MR
INSTRUCTION DESCRIPTIONS
d
Effective
S1
11
INSTRUCTION SET DETAILS
OPTIONAL EFFECTIVE ADDRESS EXTENSION
16
f
S0
10
Go to: www.freescale.com
W
15
I1
9
0
M
I0
8
M
0
0
0
0
1
1
1
1
1
S
7
M
0 0 r r
0 1 r r
1 0 r r
1 1 r r
0 0 r r
0 1 r r
1 1 r r
1 0 0 0 0
1 0 1 0 0
6
L
R
R
E
5
R
8
U
4
CCR
7
r
r
r
r
r
r
r
N
3
INSTRUCTION OPCODE
Z
2
V
1
C
0
X:R
0
A - 183

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