dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 71

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

The MOVE instruction in Figure 4-13 takes the contents of the X0 register and moves it
to a location in the X memory pointed to by (R2), and then (R2) is updated modulo 21. The
new value of R2 is not 90 (75+ 15), which would be the case if linear arithmetic had been
used, but rather is 69 since modulo arithmetic was used.
4.4.2.2.2
In this range, the modulo (M) equals (Mn+1)-$8000, where Mn is the value in the modi-
fier register (see Table 4-2). This range firmly restricts the address register to the same
buffer, causing the address register to wrap around within the buffer. This multiple wrap-
around addressing feature reduces argument overhead and is useful for decimation,
interpolation, and waveform generation.
The address modification is performed modulo M, where M may be any power of 2 in the
range from 2
within an address range of size M defined by a lower and upper address boundary. The
value M-1 is stored in the modifier register Mn least significant 14 bits while the two most
significant bits are set to ‘10’. The lower boundary (base address) value must have zeroes
in the k LSBs, where 2
is the lower boundary plus the modulo size minus one (base address plus M-1).
MOTOROLA
1
Mn=$8001 to $BFFF
to 2
14
. Modulo M arithmetic causes the address register value to remain
k
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= M, and therefore must be a multiple of 2
0..010 00000
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Figure 4-13 Modulo Modifier Example
LET:
ADDRESS GENERATION UNIT
R2
k=5
M2
N2
R2
EXAMPLE: MOVE X0,X:(R2)+N
+
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ADDRESSING
00.....0010100
00.....0001111
00.....1001011
(90)
(75)
(69)
N2
MODULUS=21
OFFSET=15
POINTER=75
(84)
(64)
21
XD BUS
X0
k
. The upper boundary
4 - 21