dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 438

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Operation:
where ( . . . . . ) refers to any arithmetic or logical instruction which allows parallel moves.
Description: Update the specified address register according to the specified effective
addressing mode. All update addressing modes may be used.
Example:
Explanation of Example: Prior to execution, the 16-bit address register R3 contains the
value $0007, and the 16-bit address offset register N3 contains the value $0004. The
execution of the parallel move portion of the instruction, (R3)+N3, updates the R3
address register according to the specified effective addressing mode by adding the
value in the R3 register to the value in the N3 register and storing the 16-bit result back in
the R3 address register.
Condition Codes:
The condition codes are not affected by this type of parallel move.
A - 172
U
( . . . . . ); ea Rn
RND B (R3)+N3
N3
R3
15
LF
:
:
DM
14
Before Execution
13
T
Freescale Semiconductor, Inc.
$0007
**
12
$0004
For More Information On This Product,
MR
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
Address Register Update
S0
10
Go to: www.freescale.com
I1
;round value in B into B1, R3+N3 R3
9
I0
8
S
7
N3
Assembler Syntax:
R3
6
L
( . . . . . ) ea
E
5
After Execution
U
4
CCR
$000B
$0004
N
3
Z
2
V
1
C
0
MOTOROLA
U

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