dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 73

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
As an example, consider a 1024-point FFT with real data stored in the X memory and
imaginary data stored in the Y memory. Since 1,024=2
is zero to select bit-reverse addressing. Offset register (Nn) contains the value 512 (2
1)
boundary of the memory buffer that holds the results of the FFT. The upper boundary is
4,095 (lower boundary + (2
Postincrementing by + N generates the address sequence (0, 512, 256, 768, 128, 640,...),
which is added to the lower boundary. This sequence (0, 512, etc.) is the scrambled FFT
data order for sequential frequency points from 0 to 2 . Table 4-3 shows the successive
contents of Rn when using (Rn)+ Nn updates.
The reverse-carry modifier only works when the base address of the FFT data buffer is a
multiple of 2
postincrement by + Nn is possible but may not provide a useful result.
MOTOROLA
), and the pointer register (Rn) contains 3,072 (L x (2
3. Set Rn between the lower boundary and upper boundary in the buffer mem-
4. Use the (Rn)+ Nn addressing mode.
ory. The lower boundary is L x (2
boundary gives a 16-bit binary number “xx . . . xx00 . . . 00”, where xx . . . xx=L
and 00 . . . 00 equals k zeros. The upper boundary is L x (2
boundary gives a 16-bit binary number “xx . . . xx11 . . . 11”, where xx . . . xx=L
and 11 . . . 11 equals k ones.
k
, such as 1,024, 2,048, 3,072, etc. The use of addressing modes other than
Freescale Semiconductor, Inc.
Rn Contents
Table 4-3 Bit-Reverse Addressing
For More Information On This Product,
k
ADDRESS GENERATION UNIT
3072
3584
3328
3840
3200
3712
)–1=3,072+ 1,023).
Sequence Example
Go to: www.freescale.com
ADDRESSING
k
), where L is an arbitrary whole number. This
Lower Boundary
Offset From
768
128
640
512
256
0
10
, k=10. The modifier register (Mn)
k
)=3 x (2
10
)), which is the lower
k
)+ ((2
k
)–1). This
4 - 23
(k–

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