dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 89

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
tor (MAC). The scaling modes are shown in the following table:
The scaling mode affects data read from the A or B accumulator registers out to the XDB
and YDB. Different scaling modes can occur with the same program code to allow dynam-
ic scaling. Dynamic scaling facilitates block floating-point arithmetic. The scaling mode
also affects the MAC rounding position to maintain proper rounding when different por-
tions of the accumulator registers are read out to the XDB and YDB. The scaling mode
bits, which are cleared at the start of a long interrupt service routine, are also cleared dur-
ing a processor reset.
5.4.2.11
This bits is reserved for future expansion and will read as zero during DSP read opera-
tions.
5.4.2.12
The trace mode (T) bit specifies the tracing function of the DSP56000/56001 only . (With
other members of the DSP56K family, use the OnCE trace mode described in Section
10.5.) For the DSP56000/56001, if the T bit is set at the beginning of any instruction exe-
cution, a trace exception will be generated after the instruction execution is completed. If
the T bit is cleared, tracing is disabled and instruction execution proceeds normally. If a
long interrupt is executed during a trace exception, the SR with the trace bit set will be
stacked, and the trace bit in the SR is cleared (see SECTION 7 – PROCESSING
STATES for a complete description of a long interrupt operation). The T bit is also
cleared during processor reset.
5.4.2.13
The processor is in double precision multiply mode when this bit is set. (See Section 3.4
for detailed information on the double precision multiply mode.) When the DM bit is set,
the operations performed by the MPY and MAC instructions change so that a double
precision 48-bit by 48-bit double precision multiplication can be performed in six instruc-
MOTOROLA
Reserved Status (Bit 12)
Trace Mode (Bit 13)
Double Precision Multiply Mode (Bit 14)
S1
0
0
1
1
S0
0
1
0
1
Freescale Semiconductor, Inc.
For More Information On This Product,
Rounding
PROGRAM CONTROL UNIT
Bit
23
24
22
PROGRAMMING MODEL
Go to: www.freescale.com
No Scaling
Scale Down (1-Bit Arithmetic Right Shift)
Scale Up (1-Bit Arithmetic Left Shift)
Reserved for Future Expansion
Scaling Mode
5 - 13

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