dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 161

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.6
The STOP instruction brings the processor into the stop processing state, which is the
lowest power consumption state. In the stop state, the clock oscillator is gated off;
whereas, in the wait state, the clock oscillator remains active. The chip clears all periph-
eral interrupts and external interrupts (IRQA, IRQB, and NMI) when it enters the stop
state. Trace or stack errors that were pending, remain pending. The priority levels of the
peripherals remain as they were before the STOP instruction was executed. The on-chip
peripherals are held in their respective individual reset states while in the stop state.
MOTOROLA
i
ii
n = NORMAL INSTRUCTION WORD
FETCH
DECODE
EXECUTE
INSTRUCTION CYCLE COUNT
= INTERRUPT
= INTERRUPT INSTRUCTION WORD
INTERRUPT CONTROL CYCLE 1
INTERRUPT CONTROL CYCLE 2
STOP PROCESSING STATE
Figure 7-16 Simultaneous Wait Instruction and Interrupt
Freescale Semiconductor, Inc.
For More Information On This Product,
STOP PROCESSING STATE
n2
n1
n3
1
PROCESSING STATES
Go to: www.freescale.com
WAIT
n4
n2
2
WAIT
3
INTERRUPT SYNCHRONIZED AND
RECOGNIZED AS PENDING
4
EQUIVALENT TO EIGHT NOPs
5
6
7
i
8
i
ii1
9
10
ii2
ii1
7 - 37
n4
11
ii2
ii1

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