dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 610
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 610 of 637
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B - 6
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;Motorola Austin DSP Operation
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;DSP56000/1
;20 - tap FIR filter
;File name: 1-56.asm
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**********************************************************************************************************************
page 132,66,0,6
opt
Maximum sample rate: 379.6 kHz at 20.5 MHz/500.0 kHz at 27.0 MHz
Memory Size: Prog: 4+6 words; Data: 2x20 words
Number of clock cycles: 54 (27 instruction cycles)
Clock Frequency: 20.5 MHz/27.0 MHz
Instruction cycle time: 97.6 ns/74.1 ns
This FIR filter reads the input sample
from the memory location Y:input
and writes the filtered output sample
to the memory location Y:output
The samples are stored in the X memory
The coefficients are stored in the Y memory
rc
Figure B-1 20-Tap FIR Filter Example (Sheet 1 of 2)
x(n)
R0
t+T
Freescale Semiconductor, Inc.
t
For More Information On This Product,
X MEMORY
T
T
X(n-k+1) X(n+1)
T
X(n-1)
BENCHMARK PROGRAMS
X(n)
BENCHMARK PROGRAMS
June 30, 1988
Go to: www.freescale.com
C(K-1)
FIR
C(0)
C(1)
C(2)
X
X
X
X
t,t+T
+
y n
Y MEMORY
c(k-1)
c(0)
c(1)
=
p
k 1
y(n)
–
=
0
c p
n
–
p
MOTOROLA
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