dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 302
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 302 of 637
- Download datasheet (4Mb)
Assembler Syntax:
Description: Arithmetically shift the destination operand D one bit to the left and store
the result in the destination accumulator. The MS bit of D prior to instruction execution is
shifted into the carry bit C and a zero is shifted into the LS bit of the destination accumu-
lator D. If a zero shift count is specified, the carry bit is cleared. The difference between
ASL and LSL is that ASL operates on the entire 56 bits of the accumulator and therefore
sets the V bit if the number overflowed.
Example:
Explanation of Example: Prior to execution, the 56-bit A accumulator contains the
value $A5:012345:012345. The execution of the ASL A instruction shifts the 56-bit value
in the A accumulator one bit to the left and stores the result back in the A accumulator.
A - 36
Operation:
ASL
ASL A
SR
A
:
:
C
(R3)–
$A5:012345:012345
Before Execution
55
Freescale Semiconductor, Inc.
For More Information On This Product,
Arithmetic Shift Accumulator Left
ASL D (parallel move)
INSTRUCTION DESCRIPTIONS
$0300
INSTRUCTION SET DETAILS
47
;multiply A by 2, update R3
Go to: www.freescale.com
23
SR
A
$4A:02468A:02468A
After Execution
0
$0373
0 (parallel move)
MOTOROLA
ASL
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