dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 507

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
cess in the R3 address register. A negative value reflects the number of left shifts
performed; a positive value reflects the number of right shifts performed during the nor-
malization process.
Condition Codes:
L — Set if overflow has occurred in A or B result
E — Set if the signed integer portion of A or B result is in use
U — Set if A or B result is unnormalized
N — Set if bit 55 of A or B result is set
Z — Set if A or B result equals zero
V — Set if bit 55 is changed as a result of a left shift
Note: The definitions of the E and U bits vary according to the scaling mode being used.
Refer to Section A.5 CONDITION CODE COMPUTATION for complete details.
Instruction Format:
Opcode:
Instruction Fields:
Timing: 2 oscillator clock cycles
Memory: 1 program word
MOTOROLA
NORM
NORM
D d
A 0
B 1
where “nnn” = Rn number
0
23
LF
1
0
5
0
Rn,D
DM
14
0
Rn
13
Rn
T
0
Freescale Semiconductor, Inc.
**
0
12
INSTRUCTION SET DESCRIPTIONS
R R R
For More Information On This Product,
n n n
MR
0
S1
11
INSTRUCTION SET DETAILS
Normalize Accumulator Iteration
1
16 15
S0
10
Go to: www.freescale.com
1
1
I1
9
0
I0
8
1
S
7
1
R
L
6
R
E
5
R
8
U
4
7
CCR
0
N
3
0
0
Z
2
1
V
1
d
NORM
C
0
1
0
0
1
A - 241

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