dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 306
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 306 of 637
- Download datasheet (4Mb)
Operation:
Description: Test the n
result in the destination location. The state of the n
condition code register. The bit to be tested is selected by an immediate bit number from
0–23. This instruction performs a read-modify-write operation on the destination location
using two destination accesses before releasing the bus. This instruction provides a test-
and-change capability which is useful for synchronizing multiple processors using a
shared memory. This instruction can use all memory alterable addressing modes.
Example:
A - 40
BCHG
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
D[n]
X:$FFE2
BCHG
SR
C;
D[n]
C;
D[n]
C;
D[n]
C;
D[n]
C;
D[n]
C;
D[n]
C;
D[n]
:
:
Before Execution
#$7,X:<<$FFE2
Freescale Semiconductor, Inc.
th
For More Information On This Product,
$000000
bit of the destination operand D, complement it, and store the
$0300
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Bit Test and Change
Go to: www.freescale.com
;test and change bit 7 in I/O Port B DDR
X;$FFE2
Assembler Syntax:
SR
th
BCHG
BCHG
BCHG
BCHG
BCHG
BCHG
BCHG
bit is stored in the carry bit C of the
After Execution
#n,X:ea
#n,X:aa
#n,X:pp
#n,Y:ea
#n,Y:aa
#n,Y:pp
#n,D
$000080
$0300
BCHG
MOTOROLA
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