dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 441
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
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Note :Due to instruction pipelining, if an AGU register (Mn, Nn, or Rn) is directly changed
with this instruction, the new contents may not be available for use until the second fol-
lowing instruction. See the restrictions discussed in A.9.6 - R, N, and M Register Restric-
tions on page A-page 310.
Example:
Explanation of Example: Prior to execution, the 16-bit R2 address register contains the
value $1001, and the 24-bit X memory location X:$1000 contains the value $000000.
The execution of the parallel move portion of the instruction, R2,X:–(R2), predecrements
the R2 address register and then uses the R2 address register to move the updated con-
tents of the R2 address register into the 24-bit X memory location X:$1000.
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION.
L — Set if data limiting has occurred during parallel move.
Note: The MOVE A,X:ea operation will result in a 24-bit positive or negative saturation
constant being stored in the specified 24-bit X memory location if the signed integer por-
tion of the A accumulator is in use.
MOTOROLA
X:
X:$1000
ASL A
R2
15
LF
:
:
DM
14
R2,X:–(R2)
Before Execution
13
T
$000000
Freescale Semiconductor, Inc.
$1001
12
**
For More Information On This Product,
MR
INSTRUCTION DESCRIPTIONS
11
S1
INSTRUCTION SET DETAILS
X Memory Data Move
10
S0
Go to: www.freescale.com
I1
9
;A 2 A, save updated R2 in X:(R2)
I0
8
X:$1000
7
S
R2
6
L
5
E
After Execution
4
U
CCR
$001000
$1000
3
N
2
Z
1
V
0
C
A - 175
X:
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