dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 623

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

;
; Normal order input and normal order output.
;
; Since 56001 does not support bergland addressing, extra instruction cycles are needed
; for converting bergland order to normal order. It has been done in the last pass by
; looking at the bergtable.
; The micro ‘bergsincos’ generates SIN and COS table with size of points/4, COS in Y, SIN in X
; The micro ‘bergorder’ generates table for address conversion, the size of twiddle factors is half
; of FFT output’s.
; The micro ‘norm2berg’ converts normal order data to bergland order.
; The micro ‘rfft-56b’ does FFT.
;
; Real input data are split into two parts, the first part is put in X, the second in Y.
; Real output data are in X, imaginary output data are in Y.
; The bergland table for converting berglang order to normal order is stored in output buffer.
; In the last pass the FFT output overwrites this table.
; The first real output plus the first imaginary output is DC value of the spectrum.
; Note that only DC to Nyquist frequency range is calculated by this algorithm.
; After twiddle factors and bergtable are generated, you may overwrite ‘bergorder’,
; ‘norm2berg’ by ‘rfft-56b’ for saving P memory.
;
;
;-----------------------------------------------------------------
; Real input data points
;
;
;
;
;
;------------------------------------------------------------------
;
;
;------------------------------------------------------------------
;
;
;
;
;
;-------------------------------------------------------------------
;
;
rfft56bt
;
MOTOROLA
Real input FFT based on Glenn Bergland algorithm
Figure B-5 Real Input FFT Based on Glenn Bergland Algorithm (Sheet 8 of 8)
P memory
87
1024
128
256
512
64
ident 1,3
page
opt
include ‘bergsincos’
include ‘bergorder’
include ‘norm2berg’
include ‘rfft-56b’
points/2 (real input) +
points/4 (SIN table) +
points/2 (real output) +
points/2 (bergtable)
Memory (word)
Performance
132,60
nomd,nomex,loc,nocex,mu
Freescale Semiconductor, Inc.
X memory
For More Information On This Product,
BENCHMARK PROGRAMS
BENCHMARK PROGRAMS
Go to: www.freescale.com
Clock cycle
points/4 (COS table)
19296
49776
points/2 (imaginary input)
points/2 (imaginary output)
1686
3846
8656
Y memory
B - 19