dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 508
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
- Current page: 508 of 637
- Download datasheet (4Mb)
Operation:
Description: Take the ones complement of bits 47–24 of the destination operand D and
store the result back in bits 47–24 of the destination accumulator. This is a 24-bit opera-
tion. The remaining bits of D are not affected.
Example:
Explanation of Example: Prior to execution, the 56-bit A accumulator contains the
value $00:123456:789ABC. The NOT A instruction takes the ones complement of bits
47–24 of the A accumulator (A1) and stores the result back in the A1 register. The
remaining bits of the A accumulator are not affected.
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move
N — Set if bit 47 of A or B result is set
Z — Set if bits 47-24 of A or B result are zero
V — Always cleared
A - 242
NOT
D[47:24]
where “—” denotes the logical NOT operator
NOT A1 AB,L:(R2)+
A
LF
1
5
DM
14
D[47:24] (parallel move)
$00:123456:789ABC
Before Execution
13
T
Freescale Semiconductor, Inc.
**
12
For More Information On This Product,
MR
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
S0
10
Go to: www.freescale.com
Logical Complement
I1
;save A1,B1, take the ones complement of A1
9
I0
8
S
7
Assembler Syntax:
A
L
6
E
5
NOT
$00:EDCBA9:789AB
After Execution
U
4
CCR
N
3
D (parallel move)
Z
2
V
1
C
0
MOTOROLA
NOT
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