dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 377
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
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Restrictions: A JCLR instruction cannot be repeated using the REP instruction.
A JCLR located at LA, LA–1, or LA–2 of the DO loop cannot specify the program control-
ler registers SR, SP, SSH, SSL, LA, or LC as its target.
JCLR SSH or JCLR SSL cannot follow an instruction that changes the SP.
Example:
Explanation of Example: In this example, program execution is transferred to the
address P:$1234 if bit 5 (PE) of the 8-bit read-only X memory location X:$FFF1 (I/O SCI
interface status register) is a zero. If the specified bit is not clear, no jump is taken, and
the program counter (PC) is incremented by one.
Condition Codes:
For destination operand A or B:
For other source operands:
The condition codes are not affected.
MOTOROLA
JCLR
S —Computed according to the definition. See Notes on page A-115.
L — Set if data limiting has occurred. See Notes on page A-115.
E — Not affected
U — Not affected
N — Not affected
Z — Not affected
V — Not affected
C — Not affected
JCLR #$5,X:<<$FFF1,$1234
15
LF
:
:
DM
14
13
T
Freescale Semiconductor, Inc.
**
12
For More Information On This Product,
MR
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
S0
10
Go to: www.freescale.com
Jump if Bit Clear
I1
9
I0
8
;go to P:$1234 if bit 5 in SCI SSR is clear
S
7
6
L
E
5
U
4
CCR
N
3
Z
2
V
1
C
0
JCLR
A - 111
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