LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1213

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1
2
3
Freescale Semiconductor
Conditions are 3.13 V < V
I/O Characteristics for all I/O pins except EXTAL, XTAL,TEST and supply pins.
13
14
15
16
17
18
Maximum leakage current occurs at maximum operating temperature.
Refer to
Parameter only applies in stop or pseudo stop mode.
D Port H, J, P interrupt input pulse filtered (STOP)
D Port H, J, P interrupt input pulse passed(STOP)
D Port H, J, P interrupt input pulse filtered (STOP)
D Port H, J, P interrupt input pulse passed(STOP)
D IRQ pulse width, edge-sensitive mode (STOP)
D XIRQ pulse width with X-bit set (STOP)
Section A.1.4, “Current Injection”
DD35
< 3.6 V temperature from –40°C to +150°C, unless otherwise noted
MC9S12XE-Family Reference Manual Rev. 1.23
Table A-7. 3.3-V I/O Characteristics
for more details
3
3
t
t
t
t
PW
PW
PULSE
PULSE
PULSE
PULSE
IRQ
XIRQ
10
4
1
4
Appendix A Electrical Characteristics
3
3
µs
µs
tcyc
tcyc
tcyc
tosc
1213

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