LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 424

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 10 XGATE (S12XGATEV3)
CMP
Operation
RS1 – RS2
RD – IMM16 ⇒ NONE (translates to CMPL RD, #IMM16[7:0]; CPCH RD, #IMM16[15:8])
Subtracts two 16 bit values and discards the result.
CCR Effects
Code and CPU Cycles
424
N:
Z:
V:
C:
CMP RS1, RS2
CMP RS, #IMM16
N
∆
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RS1[15] & RS2[15] & result[15] | RS1[15] & RS2[15] & result[15]
RD[15] & IMM16[15] & result[15] | RD[15] & IMM16[15] & result[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RS1[15] & RS2[15] | RS1[15] & result[15] | RS2[15] & result[15]
RD[15] & IMM16[15] | RD[15] & result[15] | IMM16[15] & result[15]
Z
∆
V
∆
Source Form
⇒ NONE (translates to SUB R0, RS1, RS2)
C
∆
MC9S12XE-Family Reference Manual , Rev. 1.23
Address
Mode
IMM8
IMM8
TRI
0
1
1
Compare
0
1
1
0
0
0
1
1
1
1
0
1
0
Machine Code
RS
RS
0
0
RS1
IMM16[15:8]
IMM16[7:0]
RS2
Freescale Semiconductor
CMP
0
0
Cycles
P
P
P