LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 561

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.3.2.25 Output Compare Pin Disconnect Register (OCPD)
Read: Anytime
Write: Anytime
All bits reset to zero.
14.3.2.26 Precision Timer Prescaler Select Register (PTPSR)
Read: Anytime
Write: Anytime
All bits reset to zero.
Freescale Semiconductor
Module Base + 0x002C
Module Base + 0x002E
OCPD[7:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
PTPS[7:0]
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
7:0
7:0
W
W
R
R
OCPD7
PTPS7
Output Compare Pin Disconnect Bits
0 Enables the timer channel IO port. Output Compare actions will occur on the channel pin. These bits do not
1
Precision Timer Prescaler Select Bits — These eight bits specify the division rate of the main Timer prescaler.
These are effective only when the PRNT bit of TSCR1 is set to 1.
in this case.
The newly selected prescale factor will not take effect until the next synchronized edge where all prescale counter
stages equal zero.
0
0
7
7
Disables the timer channel IO port. Output Compare actions will not affect on the channel pin; the output
affect the input capture or pulse accumulator functions.
compare flag will still be set on an Output Compare event.
Figure 14-49. Precision Timer Prescaler Select Register (PTPSR)
Figure 14-48. Output Compare Pin Disconnect Register (OCPD)
OCPD6
PTPS6
0
0
6
6
MC9S12XE-Family Reference Manual Rev. 1.23
Table 14-33. PTPSR Field Descriptions
Table 14-32. OCPD Field Descriptions
OCPD5
PTPS5
5
0
5
0
OCPD4
PTPS4
0
0
4
4
Description
Description
OCPD3
PTPS3
0
0
3
3
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
Table 14-34
OCPD2
PTPS2
2
0
2
0
shows some selection examples
OCPD1
PTPS1
0
0
1
1
OCPD0
PTPS0
0
0
0
0
561

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