LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 66

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 1 Device Overview MC9S12XE-Family
1.2.3.28
PH4 is a general-purpose input or output pin. It can be configured as a keypad wakeup input. It can be
configured as master input (during master mode) or slave output (during slave mode) pin MISO of the
serial peripheral interface 2 (SPI2). It can be configured as the receive pin RXD of serial communication
interface 4 (SCI4).
1.2.3.29
PH3 is a general-purpose input or output pin. It can be configured as a keypad wakeup input. It can be
configured as slave select pin SS of the serial peripheral interface 1 (SPI1). It can also be configured as the
transmit pin TXD of serial communication interface 7 (SCI7).
1.2.3.30
PH2 is a general-purpose input or output pin. It can be configured as a keypad wakeup input. It can be
configured as serial clock pin SCK of the serial peripheral interface 1 (SPI1). It can be configured as the
receive pin RXD of serial communication interface 7 (SCI7).
1.2.3.31
PH1 is a general-purpose input or output pin. It can be configured as a keypad wakeup input. It can be
configured as master output (during master mode) or slave input pin (during slave mode) MOSI of the
serial peripheral interface 1 (SPI1). It can also be configured as the transmit pin TXD of serial
communication interface 6 (SCI6).
1.2.3.32
PH0 is a general-purpose input or output pin. It can be configured as a keypad wakeup input. It can be
configured as master input (during master mode) or slave output (during slave mode) pin MISO of the
serial peripheral interface 1 (SPI1). It can be configured as the receive pin RXD of serial communication
interface 6 (SCI6).
1.2.3.33
PJ7 is a general-purpose input or output pin. It can be configured as a keypad wakeup input. It can be
configured as the transmit pin TXCAN for the scalable controller area network controller 0 or 4 (CAN0 or
CAN4) or as the serial clock pin SCL of the IIC0 module.
1.2.3.34
PJ6 is a general-purpose input or output pin. It can be configured as a keypad wakeup input. It can be
configured as the receive pin RXCAN for the scalable controller area network controller 0 or 4 (CAN0 or
CAN4) or as the serial data pin SDA of the IIC0 module.
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Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
PH4 / KWH4 / MISO2 / RXD4 — Port H I/O Pin 4
PH3 / KWH3 / SS1 — Port H I/O Pin 3
PH2 / KWH2 / SCK1 — Port H I/O Pin 2
PH1 / KWH1 / MOSI1 — Port H I/O Pin 1
PH0 / KWH0 / MISO1 — Port H I/O Pin 0
PJ7 / KWJ7 / TXCAN4 / SCL0 / TXCAN0— PORT J I/O Pin 7
PJ6 / KWJ6 / RXCAN4 / SDA0 / RXCAN0 — PORT J I/O Pin 6
MC9S12XE-Family Reference Manual , Rev. 1.23
Freescale Semiconductor