LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 694

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1)
19.1.2
There is a software programmable option for low power consumption in wait mode that disables the input
clock to the prescaler.
In freeze mode there is a software programmable option to disable the input clock to the prescaler. This is
useful for emulation.
19.1.3
Figure 19-1
19.2
The PWM module has a total of 8 external pins.
694
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Bus Clock
External Signal Description
Modes of Operation
Block Diagram
shows the block diagram for the 8-bit 8-channel PWM block.
PWM8B8C
Clock Select
Control
MC9S12XE-Family Reference Manual , Rev. 1.23
Alignment
Polarity
Enable
Figure 19-1. PWM Block Diagram
PWM Clock
PWM Channels
Period and Duty
Period and Duty
Period and Duty
Period and Duty
Period and Duty
Period and Duty
Period and Duty
Period and Duty
Channel 7
Channel 6
Channel 5
Channel 4
Channel 3
Channel 2
Channel 1
Channel 0
Counter
Counter
Counter
Counter
Counter
Counter
Counter
Counter
Freescale Semiconductor
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM0
PWM1

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