LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 457

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SUBL
Operation
RD – $00:IMM8 ⇒ RD
Subtracts an immediate 8 bit constant from the content of register RD using binary subtraction and stores
the result in the destination register RD.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
SUBL RD, #IMM8
N
∆
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the 8 bit operation; cleared otherwise.
RD[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
Z
∆
old
old
V
∆
Source Form
& RD[15]
& RD[15]
C
∆
new
new
MC9S12XE-Family Reference Manual Rev. 1.23
Subtract Immediate 8 bit Constant
Address
Mode
IMM8
1
(Low Byte)
1
0
0
0
Machine Code
RD
Chapter 10 XGATE (S12XGATEV3)
IMM8
SUBL
Cycles
P
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