LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 284

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 7 Background Debug Module (S12XBDMV2)
7.3
7.3.1
Table 7-2
7.3.2
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
284
0x7FFF00
0x7FFF01
0x7FFF02
0x7FFF03
0x7FFF04
0x7FFF05
0x7FFF06
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Address
Global
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Memory Map and Register Definition
shows the BDM memory map when BDM is active.
Module Memory Map
Register Descriptions
BDMCCRL R
Reserved
Reserved
Reserved
Reserved
Reserved
BDMSTS
Register
Name
0x7FFF0C–0x7FFF0E
0x7FFF00–0x7FFF0B
0x7FFF10–0x7FFFFF
Global Address
0x7FFF0F
W
W
W
W
W
W
W
R
R
R
R
R
R
ENBDM
CCR7
Bit 7
X
X
X
X
X
X
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 7-2. BDM Register Summary
= Unimplemented, Reserved
= Indeterminate
BDMACT
CCR6
Table 7-2. BDM Memory Map
X
X
X
X
X
6
Family ID (part of BDM firmware ROM)
CCR5
X
X
X
X
X
5
0
BDM firmware ROM
BDM firmware ROM
BDM registers
Module
CCR4
SDV
X
X
X
X
X
4
Figure
TRACE
CCR3
X
X
X
X
X
3
0
7-2. Registers are accessed by
= Implemented (do not alter)
= Always read zero
CLKSW
CCR2
2
X
X
X
X
X
Freescale Semiconductor
(Bytes)
Size
UNSEC
240
12
CCR1
3
1
X
X
X
X
1
0
CCR0
Bit 0
X
X
X
X
0
0