LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1241

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Defining the jitter as:
The following equation is a good fit for the maximum jitter:
Freescale Semiconductor
J(N)
Figure A-6. Maximum bus clock jitter approximation
1
MC9S12XE-Family Reference Manual Rev. 1.23
J N
( )
=
5
max 1
J N
( )
⎛
⎜
⎝
10
–
=
t
---------------------- -
N t
max
⋅
------- -
j
nom
1
N
( )
N
+
,
j
1
2
–
---------------------- -
N t
t
min
⋅
20
nom
( )
N
⎞
⎟
⎠
Appendix A Electrical Characteristics
N
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