LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 640

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)

This register keeps the data length ﬁeld of the CAN frame.

This register deﬁnes the local priority of the associated message buffer. The local priority is used for the

internal prioritization process of the MSCAN and is deﬁned to be highest for the smallest binary number.

The MSCAN implements the following internal prioritization mechanisms:

Module Base + 0x00XC

All transmission buffers with a cleared TXEx ﬂag participate in the prioritization immediately

before the SOF (start of frame) is sent.

Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective

message. During the transmission of a remote frame, the data length code is transmitted as programmed while

the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.

Data Length Register (DLR)

Transmit Buffer Priority Register (TBPR)

Figure 16-35. Data Length Register (DLR) — Extended Identiﬁer Mapping

shows the effect of setting the DLC bits.

= Unused; always read “x”

Table 16-34. DLR Register Field Descriptions

MC9S12XE-Family Reference Manual , Rev. 1.23

Table 16-35. Data Length Codes

Data Length Code

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