LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 458
LFEBS12UB
Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Specifications of LFEBS12UB
Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 458 of 1328
- Download datasheet (9Mb)
Chapter 10 XGATE (S12XGATEV3)
TFR
Operation
TFR RD,CCR: CCR ⇒ RD[3:0]; 0 ⇒ RD[15:4]
TFR CCR,RD: RD[3:0] ⇒ CCR
TFR RD,PC:
Transfers the content of one RISC core register to another.
The TFR RD,PC instruction can be used to implement relative subroutine calls.
Example:
RETADDR ...
SUBR
CCR Effects
Code and CPU Cycles
458
TFR RD,CCR, TFR RD,PC:
N:
Z:
V:
C:
TFR RD,CCR CCR ⇒ RD
TFR CCR,RS RS ⇒ CCR
TFR RD,PCPC+4 ⇒ RD
—
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
N
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Not affected.
Not affected.
Not affected.
Not affected.
—
Z
TFR
BRA
...
JAL
—
V
Source Form
—
C
PC+4 ⇒ RD
R7,PC
SUBR
R7
Transfer from and to Special Registers
;Return address (RETADDR) is stored in R7
;Relative branch to subroutine (SUBR)
;Jump to return address (RETADDR)
MC9S12XE-Family Reference Manual , Rev. 1.23
Address
Mode
MON
MON
MON
0
0
0
0
0
0
TFR CCR,RS:
0
0
0
N:
Z:
V:
C:
N
∆
0
0
0
RS[3].
RS[2].
RS[1].
RS[0].
Z
∆
0
0
0
V
∆
Machine Code
RD
RD
RS
C
∆
1
1
1
1
1
1
1
1
1
1
1
1
Freescale Semiconductor
1
1
1
0
0
0
TFR
0
0
1
0
1
0
Cycles
P
P
P
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