LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 197

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Read: Anytime. In emulation modes read operations will return the data from the external bus. In all other

modes the data is read from this register.

Write: Anytime. In emulation modes write operations will also be directed to the external bus.

The MMCCTL0 register is used to control external bus functions, like:

Freescale Semiconductor

Address: 0x000A PRR

1. ROMON is bit[0] of the register MMCTL1 (see

Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers

indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010

1. Disabled: feature always inactive.

2. Enabled: activity is controlled by the appropriate register bit value.

Availability of chip selects. (See

Control of different external stretch mechanism. For more detail refer to the S12X_EBI

CS0E[1:0], CS1E[1:0],

CS2E[1:0], CS3E[1:0]

MMC Control Register (MMCCTL0)

XGATE write access to this register during an CPU access which makes use

of this register could lead to unexpected results.

= Unimplemented or Reserved

Figure 3-3. MMC Control Register (MMCCTL0)

MC9S12XE-Family Reference Manual Rev. 1.23

Table 3-5. Chip Selects Function Activity

Chapter 3 Memory Mapping Control (S12XMMCV4)