LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 752

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 20 Serial Communication Interface (S12SCIV5)
To determine the value of a data bit and to detect noise, recovery logic takes samples at RT8, RT9, and
RT10.
To verify a stop bit and to detect noise, recovery logic takes samples at RT8, RT9, and RT10.
summarizes the results of the stop bit samples.
752
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Table 20-18
The RT8, RT9, and RT10 samples do not affect start bit verification. If any
or all of the RT8, RT9, and RT10 start bit samples are logic 1s following a
successful start bit verification, the noise flag (NF) is set and the receiver
assumes that the bit is a start bit (logic 0).
RT8, RT9, and RT10 Samples
RT8, RT9, and RT10 Samples
summarizes the results of the data bit samples.
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 20-18. Data Bit Recovery
Table 20-19. Stop Bit Recovery
NOTE
Data Bit Determination
Framing Error Flag
0
0
0
1
0
1
1
1
1
1
1
0
1
0
0
0
Noise Flag
Noise Flag
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
Freescale Semiconductor
Table 20-19

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